A Survey and Quantitative Evaluation of Integrated Circuit-Based Antenna Interfaces and Self-Interference Cancellers for Full-Duplex

Full-duplex (FD) wireless - simultaneous transmission and reception on the same frequency is a promising technique that can significantly improve spectrum efficiency reduce communication latency in future networks. To enable FD operation, powerful self-interference (SI) signal leaking from transmitter (TX) into receiver (RX) needs to be suppressed canceled an extreme degree at antenna interface as well RF/analog digital domains. Various approaches achieve TX-RX isolation SI cancellation (SIC) domains have been demonstrated, with focus using bench-top off-the-shelf components. Recent advances integrated circuit (IC) implementations of various types shared interfaces cancellers RF and/or analog baseband (BB) further pushed frontier realizing small-form-factor/hand-held devices. Moreover, it still important fundamentally study SIC performance achieved by different cancellers. In this paper, we present first-of-its-kind comprehensive overview implementation comparison state-of-the-art both BB We define two figures merit (FOM) for IC-based cancellers, which capture design considerations tradeoffs including achievable isolation/SIC, bandwidth, noise figure degradation, TX/SI power handling, consumption. particular, electrical-balance duplexers circulators. also discuss based time-domain frequency-domain approaches, respectively employ parallel delay lines bandpass filters emulate channel. Based realistic measurements, perform extensive numerical evaluations illustrate compare scenarios, tradeoffs. Finally, provide our recent work.